Type-safe SPI master bus and device driver for ESP32.
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| enum class | idfxx::spi::host_device : int {
idfxx::spi::host_device::spi1 = SPI1_HOST
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idfxx::spi::host_device::spi2 = SPI2_HOST
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idfxx::spi::host_device::spi3 = SPI3_HOST
} |
| | General purpose SPI Host Controller ID. More...
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| enum class | idfxx::spi::dma_chan : int {
idfxx::spi::dma_chan::disabled = SPI_DMA_DISABLED
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idfxx::spi::dma_chan::ch_auto = SPI_DMA_CH_AUTO
} |
| | SPI DMA channel selection. More...
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| |
| enum class | idfxx::spi::bus_flags : uint32_t {
idfxx::spi::bus_flags::slave = SPICOMMON_BUSFLAG_SLAVE
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idfxx::spi::bus_flags::master = SPICOMMON_BUSFLAG_MASTER
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idfxx::spi::bus_flags::iomux_pins = SPICOMMON_BUSFLAG_IOMUX_PINS
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idfxx::spi::bus_flags::sclk = SPICOMMON_BUSFLAG_SCLK
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idfxx::spi::bus_flags::miso = SPICOMMON_BUSFLAG_MISO
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idfxx::spi::bus_flags::mosi = SPICOMMON_BUSFLAG_MOSI
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idfxx::spi::bus_flags::dual
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idfxx::spi::bus_flags::wphd = SPICOMMON_BUSFLAG_WPHD
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idfxx::spi::bus_flags::quad = SPICOMMON_BUSFLAG_QUAD
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idfxx::spi::bus_flags::io4_io7 = SPICOMMON_BUSFLAG_IO4_IO7
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idfxx::spi::bus_flags::octal = SPICOMMON_BUSFLAG_OCTAL
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idfxx::spi::bus_flags::native_pins = SPICOMMON_BUSFLAG_NATIVE_PINS
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idfxx::spi::bus_flags::slp_allow_pd = SPICOMMON_BUSFLAG_SLP_ALLOW_PD
} |
| | SPI bus capability and configuration flags. More...
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| |
| enum class | idfxx::spi::device_flags : uint32_t {
idfxx::spi::device_flags::txbit_lsbfirst = SPI_DEVICE_TXBIT_LSBFIRST
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idfxx::spi::device_flags::rxbit_lsbfirst = SPI_DEVICE_RXBIT_LSBFIRST
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idfxx::spi::device_flags::bit_lsbfirst = SPI_DEVICE_BIT_LSBFIRST
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idfxx::spi::device_flags::three_wire = SPI_DEVICE_3WIRE
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idfxx::spi::device_flags::positive_cs = SPI_DEVICE_POSITIVE_CS
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idfxx::spi::device_flags::halfduplex = SPI_DEVICE_HALFDUPLEX
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idfxx::spi::device_flags::clk_as_cs = SPI_DEVICE_CLK_AS_CS
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idfxx::spi::device_flags::no_dummy = SPI_DEVICE_NO_DUMMY
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idfxx::spi::device_flags::ddrclk = SPI_DEVICE_DDRCLK
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idfxx::spi::device_flags::no_return_result = SPI_DEVICE_NO_RETURN_RESULT
} |
| | SPI device capability and configuration flags. More...
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| |
| enum class | idfxx::spi::trans_flags : uint32_t {
idfxx::spi::trans_flags::mode_dio = SPI_TRANS_MODE_DIO
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idfxx::spi::trans_flags::mode_qio = SPI_TRANS_MODE_QIO
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idfxx::spi::trans_flags::mode_oct = SPI_TRANS_MODE_OCT
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idfxx::spi::trans_flags::use_rxdata = SPI_TRANS_USE_RXDATA
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idfxx::spi::trans_flags::use_txdata = SPI_TRANS_USE_TXDATA
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idfxx::spi::trans_flags::multiline_addr = SPI_TRANS_MULTILINE_ADDR
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idfxx::spi::trans_flags::multiline_cmd = SPI_TRANS_MULTILINE_CMD
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idfxx::spi::trans_flags::variable_cmd = SPI_TRANS_VARIABLE_CMD
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idfxx::spi::trans_flags::variable_addr = SPI_TRANS_VARIABLE_ADDR
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idfxx::spi::trans_flags::variable_dummy = SPI_TRANS_VARIABLE_DUMMY
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idfxx::spi::trans_flags::cs_keep_active = SPI_TRANS_CS_KEEP_ACTIVE
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idfxx::spi::trans_flags::dma_buffer_align_manual = SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL
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idfxx::spi::trans_flags::dma_use_psram = SPI_TRANS_DMA_USE_PSRAM
} |
| | SPI transaction flags. More...
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| |
Type-safe SPI master bus and device driver for ESP32.
Provides SPI bus lifecycle management with support for DMA transfers, along with blocking, polling, and asynchronous queue-based transaction APIs for communicating with devices on the bus.
Depends on Core Utilities for error handling and GPIO Component for pin configuration.
◆ bus_flags
SPI bus capability and configuration flags.
These flags serve two purposes:
- When passed to bus initialization, they specify required bus capabilities that the driver will verify (e.g., requiring certain pins to be present).
- After initialization, they indicate the actual capabilities of the bus.
| Enumerator |
|---|
| slave | Bus supports slave mode.
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| master | Bus supports master mode.
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| iomux_pins | Bus uses IOMUX pins.
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| sclk | Check existing of SCLK pin. Or indicates CLK line initialized.
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| miso | Check existing of MISO pin. Or indicates MISO line initialized.
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| mosi | Check existing of MOSI pin. Or indicates MOSI line initialized.
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| dual | Check MOSI and MISO pins can output. Or indicates bus able to work under DIO mode.
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| wphd | Check existing of WP and HD pins. Or indicates WP & HD pins initialized.
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| quad | Check existing of MOSI/MISO/WP/HD pins as output.
Or indicates bus able to work under QIO mode.
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| io4_io7 | Check existing of IO4~IO7 pins. Or indicates IO4~IO7 pins initialized.
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| octal | Check existing of MOSI/MISO/WP/HD/SPIIO4/SPIIO5/SPIIO6/SPIIO7 pins as output.
Or indicates bus able to work under octal mode.
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| native_pins | Bus uses native pins.
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| slp_allow_pd | Allow to power down the peripheral during light sleep, and auto recover then.
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Definition at line 81 of file master.hpp.
◆ device_flags
SPI device capability and configuration flags.
These flags control the behavior of an SPI device, such as bit ordering, CS polarity, and duplex mode.
| Enumerator |
|---|
| txbit_lsbfirst | Transmit command/address/data LSB first.
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| rxbit_lsbfirst | Receive data LSB first.
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| bit_lsbfirst | Transmit and receive LSB first.
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| three_wire | Use MOSI for both sending and receiving.
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| positive_cs | CS is active high during a transaction.
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| halfduplex | Transmit data before receiving, not simultaneously.
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| clk_as_cs | Output clock on CS line while CS is active.
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| no_dummy | Disable automatic dummy bit insertion.
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| ddrclk | Use double data rate clocking.
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| no_return_result | Don't return descriptor on completion (use post_cb).
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Definition at line 108 of file master.hpp.
◆ dma_chan
SPI DMA channel selection.
| Enumerator |
|---|
| disabled | No DMA.
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| ch_auto | Auto select DMA channel.
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Definition at line 63 of file master.hpp.
◆ host_device
General purpose SPI Host Controller ID.
| Enumerator |
|---|
| spi1 | SPI1.
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| spi2 | SPI2.
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| spi3 | SPI3.
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Definition at line 51 of file master.hpp.
◆ trans_flags
SPI transaction flags.
Per-transaction flags that control data transfer mode, variable-length command/address/dummy phases, and DMA buffer behavior.
| Enumerator |
|---|
| mode_dio | Transmit/receive data in 2-bit mode.
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| mode_qio | Transmit/receive data in 4-bit mode.
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| mode_oct | Transmit/receive data in 8-bit mode.
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| use_rxdata | Receive into inline rx_data instead of rx_buffer.
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| use_txdata | Transmit inline tx_data instead of tx_buffer.
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| multiline_addr | Use multi-line mode for address phase.
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| multiline_cmd | Use multi-line mode for command phase.
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| variable_cmd | Use per-transaction command_bits length.
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| variable_addr | Use per-transaction address_bits length.
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| variable_dummy | Use per-transaction dummy_bits length.
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| cs_keep_active | Keep CS active after data transfer.
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| dma_buffer_align_manual | Disable automatic DMA buffer re-alignment.
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| dma_use_psram | Use PSRAM for DMA buffer directly. Requires ESP-IDF 6.0+.
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Definition at line 128 of file master.hpp.