idfxx 1.0.0
Modern C++23 components for ESP-IDF
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SPI Component

Type-safe SPI master bus and device driver for ESP32. More...

Namespaces

namespace  idfxx
 
namespace  idfxx::spi
 SPI driver classes.
 

Classes

struct  idfxx::spi::transaction
 SPI transaction descriptor for full-control transactions. More...
 
struct  idfxx::spi::bus_config
 SPI bus configuration. More...
 
class  idfxx::spi::master_bus
 A SPI master bus. More...
 
class  idfxx::spi::master_device
 A device on a SPI master bus. More...
 

Enumerations

enum class  idfxx::spi::host_device : int {
  idfxx::spi::host_device::spi1 = SPI1_HOST ,
  idfxx::spi::host_device::spi2 = SPI2_HOST ,
  idfxx::spi::host_device::spi3 = SPI3_HOST
}
 General purpose SPI Host Controller ID. More...
 
enum class  idfxx::spi::dma_chan : int {
  idfxx::spi::dma_chan::disabled = SPI_DMA_DISABLED ,
  idfxx::spi::dma_chan::ch_auto = SPI_DMA_CH_AUTO
}
 SPI DMA channel selection. More...
 
enum class  idfxx::spi::bus_flags : uint32_t {
  idfxx::spi::bus_flags::slave = SPICOMMON_BUSFLAG_SLAVE ,
  idfxx::spi::bus_flags::master = SPICOMMON_BUSFLAG_MASTER ,
  idfxx::spi::bus_flags::iomux_pins = SPICOMMON_BUSFLAG_IOMUX_PINS ,
  idfxx::spi::bus_flags::sclk = SPICOMMON_BUSFLAG_SCLK ,
  idfxx::spi::bus_flags::miso = SPICOMMON_BUSFLAG_MISO ,
  idfxx::spi::bus_flags::mosi = SPICOMMON_BUSFLAG_MOSI ,
  idfxx::spi::bus_flags::dual ,
  idfxx::spi::bus_flags::wphd = SPICOMMON_BUSFLAG_WPHD ,
  idfxx::spi::bus_flags::quad = SPICOMMON_BUSFLAG_QUAD ,
  idfxx::spi::bus_flags::io4_io7 = SPICOMMON_BUSFLAG_IO4_IO7 ,
  idfxx::spi::bus_flags::octal = SPICOMMON_BUSFLAG_OCTAL ,
  idfxx::spi::bus_flags::native_pins = SPICOMMON_BUSFLAG_NATIVE_PINS ,
  idfxx::spi::bus_flags::slp_allow_pd = SPICOMMON_BUSFLAG_SLP_ALLOW_PD
}
 SPI bus capability and configuration flags. More...
 
enum class  idfxx::spi::device_flags : uint32_t {
  idfxx::spi::device_flags::txbit_lsbfirst = SPI_DEVICE_TXBIT_LSBFIRST ,
  idfxx::spi::device_flags::rxbit_lsbfirst = SPI_DEVICE_RXBIT_LSBFIRST ,
  idfxx::spi::device_flags::bit_lsbfirst = SPI_DEVICE_BIT_LSBFIRST ,
  idfxx::spi::device_flags::three_wire = SPI_DEVICE_3WIRE ,
  idfxx::spi::device_flags::positive_cs = SPI_DEVICE_POSITIVE_CS ,
  idfxx::spi::device_flags::halfduplex = SPI_DEVICE_HALFDUPLEX ,
  idfxx::spi::device_flags::clk_as_cs = SPI_DEVICE_CLK_AS_CS ,
  idfxx::spi::device_flags::no_dummy = SPI_DEVICE_NO_DUMMY ,
  idfxx::spi::device_flags::ddrclk = SPI_DEVICE_DDRCLK ,
  idfxx::spi::device_flags::no_return_result = SPI_DEVICE_NO_RETURN_RESULT
}
 SPI device capability and configuration flags. More...
 
enum class  idfxx::spi::trans_flags : uint32_t {
  idfxx::spi::trans_flags::mode_dio = SPI_TRANS_MODE_DIO ,
  idfxx::spi::trans_flags::mode_qio = SPI_TRANS_MODE_QIO ,
  idfxx::spi::trans_flags::mode_oct = SPI_TRANS_MODE_OCT ,
  idfxx::spi::trans_flags::use_rxdata = SPI_TRANS_USE_RXDATA ,
  idfxx::spi::trans_flags::use_txdata = SPI_TRANS_USE_TXDATA ,
  idfxx::spi::trans_flags::multiline_addr = SPI_TRANS_MULTILINE_ADDR ,
  idfxx::spi::trans_flags::multiline_cmd = SPI_TRANS_MULTILINE_CMD ,
  idfxx::spi::trans_flags::variable_cmd = SPI_TRANS_VARIABLE_CMD ,
  idfxx::spi::trans_flags::variable_addr = SPI_TRANS_VARIABLE_ADDR ,
  idfxx::spi::trans_flags::variable_dummy = SPI_TRANS_VARIABLE_DUMMY ,
  idfxx::spi::trans_flags::cs_keep_active = SPI_TRANS_CS_KEEP_ACTIVE ,
  idfxx::spi::trans_flags::dma_buffer_align_manual = SPI_TRANS_DMA_BUFFER_ALIGN_MANUAL ,
  idfxx::spi::trans_flags::dma_use_psram = SPI_TRANS_DMA_USE_PSRAM
}
 SPI transaction flags. More...
 

Detailed Description

Type-safe SPI master bus and device driver for ESP32.

Provides SPI bus lifecycle management with support for DMA transfers, along with blocking, polling, and asynchronous queue-based transaction APIs for communicating with devices on the bus.

Depends on Core Utilities for error handling and GPIO Component for pin configuration.

Enumeration Type Documentation

◆ bus_flags

SPI bus capability and configuration flags.

These flags serve two purposes:

  • When passed to bus initialization, they specify required bus capabilities that the driver will verify (e.g., requiring certain pins to be present).
  • After initialization, they indicate the actual capabilities of the bus.
Enumerator
slave 

Bus supports slave mode.

master 

Bus supports master mode.

iomux_pins 

Bus uses IOMUX pins.

sclk 

Check existing of SCLK pin. Or indicates CLK line initialized.

miso 

Check existing of MISO pin. Or indicates MISO line initialized.

mosi 

Check existing of MOSI pin. Or indicates MOSI line initialized.

dual 

Check MOSI and MISO pins can output. Or indicates bus able to work under DIO mode.

wphd 

Check existing of WP and HD pins. Or indicates WP & HD pins initialized.

quad 

Check existing of MOSI/MISO/WP/HD pins as output.

Or indicates bus able to work under QIO mode.

io4_io7 

Check existing of IO4~IO7 pins. Or indicates IO4~IO7 pins initialized.

octal 

Check existing of MOSI/MISO/WP/HD/SPIIO4/SPIIO5/SPIIO6/SPIIO7 pins as output.

Or indicates bus able to work under octal mode.

native_pins 

Bus uses native pins.

slp_allow_pd 

Allow to power down the peripheral during light sleep, and auto recover then.

Definition at line 81 of file master.hpp.

◆ device_flags

SPI device capability and configuration flags.

These flags control the behavior of an SPI device, such as bit ordering, CS polarity, and duplex mode.

Enumerator
txbit_lsbfirst 

Transmit command/address/data LSB first.

rxbit_lsbfirst 

Receive data LSB first.

bit_lsbfirst 

Transmit and receive LSB first.

three_wire 

Use MOSI for both sending and receiving.

positive_cs 

CS is active high during a transaction.

halfduplex 

Transmit data before receiving, not simultaneously.

clk_as_cs 

Output clock on CS line while CS is active.

no_dummy 

Disable automatic dummy bit insertion.

ddrclk 

Use double data rate clocking.

no_return_result 

Don't return descriptor on completion (use post_cb).

Definition at line 108 of file master.hpp.

◆ dma_chan

SPI DMA channel selection.

Enumerator
disabled 

No DMA.

ch_auto 

Auto select DMA channel.

Definition at line 63 of file master.hpp.

◆ host_device

General purpose SPI Host Controller ID.

Enumerator
spi1 

SPI1.

spi2 

SPI2.

spi3 

SPI3.

Definition at line 51 of file master.hpp.

◆ trans_flags

SPI transaction flags.

Per-transaction flags that control data transfer mode, variable-length command/address/dummy phases, and DMA buffer behavior.

Enumerator
mode_dio 

Transmit/receive data in 2-bit mode.

mode_qio 

Transmit/receive data in 4-bit mode.

mode_oct 

Transmit/receive data in 8-bit mode.

use_rxdata 

Receive into inline rx_data instead of rx_buffer.

use_txdata 

Transmit inline tx_data instead of tx_buffer.

multiline_addr 

Use multi-line mode for address phase.

multiline_cmd 

Use multi-line mode for command phase.

variable_cmd 

Use per-transaction command_bits length.

variable_addr 

Use per-transaction address_bits length.

variable_dummy 

Use per-transaction dummy_bits length.

cs_keep_active 

Keep CS active after data transfer.

dma_buffer_align_manual 

Disable automatic DMA buffer re-alignment.

dma_use_psram 

Use PSRAM for DMA buffer directly. Requires ESP-IDF 6.0+.

Definition at line 128 of file master.hpp.