idfxx 1.0.0
Modern C++23 components for ESP-IDF
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master.hpp
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1// SPDX-License-Identifier: Apache-2.0
2// Copyright 2026 Chris Leishman
3
4#pragma once
5
20#include <idfxx/error>
21#include <idfxx/flags>
22#include <idfxx/gpio>
23#include <idfxx/intr_alloc>
24#include <idfxx/intr_types>
25
26#include <driver/spi_master.h>
27#include <memory>
28#include <string>
29
34namespace idfxx::spi {
35
40enum class host_device : int {
41 spi1 = SPI1_HOST,
42 spi2 = SPI2_HOST,
43#if SOC_SPI_PERIPH_NUM > 2
44 spi3 = SPI3_HOST,
45#endif
46};
47
52enum class dma_chan : int {
53 disabled = SPI_DMA_DISABLED,
54#if CONFIG_IDF_TARGET_ESP32
55 ch_1 = SPI_DMA_CH1,
56 ch_2 = SPI_DMA_CH2,
57#endif
58 ch_auto = SPI_DMA_CH_AUTO,
59};
60
70enum class bus_flags : uint32_t {
71 slave = SPICOMMON_BUSFLAG_SLAVE,
72 master = SPICOMMON_BUSFLAG_MASTER,
73 iomux_pins = SPICOMMON_BUSFLAG_IOMUX_PINS,
74 sclk = SPICOMMON_BUSFLAG_SCLK,
75 miso = SPICOMMON_BUSFLAG_MISO,
76 mosi = SPICOMMON_BUSFLAG_MOSI,
77 dual =
78 SPICOMMON_BUSFLAG_DUAL,
79 wphd = SPICOMMON_BUSFLAG_WPHD,
80 quad = SPICOMMON_BUSFLAG_QUAD,
82 io4_io7 = SPICOMMON_BUSFLAG_IO4_IO7,
83 octal = SPICOMMON_BUSFLAG_OCTAL,
85 native_pins = SPICOMMON_BUSFLAG_NATIVE_PINS,
86 slp_allow_pd = SPICOMMON_BUSFLAG_SLP_ALLOW_PD,
88};
89
90} // namespace idfxx::spi
91
92template<>
93inline constexpr bool idfxx::enable_flags_operators<idfxx::spi::bus_flags> = true;
94
95namespace idfxx::spi {
96
150
158public:
168 [[nodiscard]] static result<std::unique_ptr<master_bus>>
169 make(enum host_device host, enum dma_chan dma_chan, struct bus_config config);
170
171#ifdef CONFIG_COMPILER_CXX_EXCEPTIONS
182 [[nodiscard]] explicit master_bus(enum host_device host, enum dma_chan dma_chan, struct bus_config config);
183#endif
184
186
187 master_bus(const master_bus&) = delete;
188 master_bus& operator=(const master_bus&) = delete;
191
193 [[nodiscard]] enum host_device host() const { return _host; }
194
195private:
196 explicit master_bus(enum host_device host);
197
198 enum host_device _host;
199};
200
// end of idfxx_spi
202
203} // namespace idfxx::spi
204
205namespace idfxx {
206
214[[nodiscard]] inline std::string to_string(spi::host_device h) {
215 switch (h) {
217 return "SPI1";
219 return "SPI2";
220#if SOC_SPI_PERIPH_NUM > 2
222 return "SPI3";
223#endif
224 default:
225 return "unknown(" + std::to_string(static_cast<int>(h)) + ")";
226 }
227}
228
229} // namespace idfxx
230
231#include "sdkconfig.h"
232#ifdef CONFIG_IDFXX_STD_FORMAT
234#include <algorithm>
235#include <format>
236namespace std {
237template<>
238struct formatter<idfxx::spi::host_device> {
239 constexpr auto parse(format_parse_context& ctx) { return ctx.begin(); }
240
241 template<typename FormatContext>
242 auto format(idfxx::spi::host_device h, FormatContext& ctx) const {
243 auto s = idfxx::to_string(h);
244 return std::copy(s.begin(), s.end(), ctx.out());
245 }
246};
247} // namespace std
249#endif // CONFIG_IDFXX_STD_FORMAT
Type-safe set of flags from a scoped enum.
Definition flags.hpp:88
A GPIO pin.
Definition gpio.hpp:58
static constexpr gpio nc()
Returns a GPIO representing "not connected".
Definition gpio.hpp:248
A SPI master bus.
Definition master.hpp:157
master_bus & operator=(master_bus &&)=delete
master_bus(master_bus &&)=delete
static result< std::unique_ptr< master_bus > > make(enum host_device host, enum dma_chan dma_chan, struct bus_config config)
Creates a new SPI master bus.
master_bus(const master_bus &)=delete
master_bus(enum host_device host, enum dma_chan dma_chan, struct bus_config config)
Constructs a new SPI master bus.
enum host_device host() const
Returns the host device ID the bus is using.
Definition master.hpp:193
master_bus & operator=(const master_bus &)=delete
std::string to_string(core_id c)
Returns a string representation of a CPU core identifier.
Definition cpu.hpp:52
dma_chan
SPI DMA channel selection.
Definition master.hpp:52
bus_flags
SPI bus capability and configuration flags.
Definition master.hpp:70
host_device
General purpose SPI Host Controller ID.
Definition master.hpp:40
@ ch_auto
Auto select DMA channel.
@ slp_allow_pd
Allow to power down the peripheral during light sleep, and auto recover then.
@ slave
Bus supports slave mode.
@ iomux_pins
Bus uses IOMUX pins.
@ octal
Check existing of MOSI/MISO/WP/HD/SPIIO4/SPIIO5/SPIIO6/SPIIO7 pins as output.
@ dual
Check MOSI and MISO pins can output. Or indicates bus able to work under DIO mode.
@ quad
Check existing of MOSI/MISO/WP/HD pins as output.
@ io4_io7
Check existing of IO4~IO7 pins. Or indicates IO4~IO7 pins initialized.
@ wphd
Check existing of WP and HD pins. Or indicates WP & HD pins initialized.
@ native_pins
Bus uses native pins.
@ mosi
Check existing of MOSI pin. Or indicates MOSI line initialized.
@ miso
Check existing of MISO pin. Or indicates MISO line initialized.
@ master
Bus supports master mode.
@ sclk
Check existing of SCLK pin. Or indicates CLK line initialized.
SPI driver classes.
Definition master.hpp:34
std::expected< T, std::error_code > result
result type wrapping a value or error code.
Definition error.hpp:118
intr_cpu_affinity_t
Interrupt CPU core affinity.
@ automatic
Install the peripheral interrupt to ANY CPU core, decided by on which CPU the interrupt allocator is ...
SPI bus configuration.
Definition master.hpp:113
idfxx::flags< idfxx::intr_flag > intr_flags
Interrupt flags to set priority and IRAM attribute.
Definition master.hpp:145
int max_transfer_sz
Maximum transfer size, in bytes.
Definition master.hpp:137
idfxx::gpio data4_io_num
GPIO pin for spi data4 signal in octal mode, or gpio::nc() if not used.
Definition master.hpp:131
idfxx::gpio data6_io_num
GPIO pin for spi data6 signal in octal mode, or gpio::nc() if not used.
Definition master.hpp:133
idfxx::gpio data2_io_num
GPIO pin for spi data2 signal in quad/octal mode, or gpio::nc() if not used.
Definition master.hpp:125
idfxx::gpio mosi_io_num
GPIO pin for Master Out Slave In (=spi_d) signal.
Definition master.hpp:115
idfxx::gpio data1_io_num
GPIO pin for spi data1 signal in quad/octal mode.
Definition master.hpp:120
idfxx::gpio quadhd_io_num
GPIO pin for HD (Hold) signal, or gpio::nc() if not used.
Definition master.hpp:128
idfxx::gpio data0_io_num
GPIO pin for spi data0 signal in quad/octal mode.
Definition master.hpp:116
idfxx::gpio data5_io_num
GPIO pin for spi data5 signal in octal mode, or gpio::nc() if not used.
Definition master.hpp:132
idfxx::gpio quadwp_io_num
GPIO pin for WP (Write Protect) signal, or gpio::nc() if not used.
Definition master.hpp:124
idfxx::gpio data3_io_num
GPIO pin for spi data3 signal in quad/octal mode, or gpio::nc() if not used.
Definition master.hpp:129
idfxx::intr_cpu_affinity_t isr_cpu_id
Select cpu core to register SPI ISR.
Definition master.hpp:142
idfxx::gpio miso_io_num
GPIO pin for Master In Slave Out (=spi_q) signal.
Definition master.hpp:119
idfxx::gpio sclk_io_num
GPIO pin for SPI Clock signal.
Definition master.hpp:122
idfxx::gpio data7_io_num
GPIO pin for spi data7 signal in octal mode, or gpio::nc() if not used.
Definition master.hpp:134
bool data_io_default_level
Output data IO default level when no transaction.
Definition master.hpp:136